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-rw-r--r--linden/indra/llcommon/llprocessor.cpp184
1 files changed, 162 insertions, 22 deletions
diff --git a/linden/indra/llcommon/llprocessor.cpp b/linden/indra/llcommon/llprocessor.cpp
index bd21351..4d00ab5 100644
--- a/linden/indra/llcommon/llprocessor.cpp
+++ b/linden/indra/llcommon/llprocessor.cpp
@@ -58,7 +58,7 @@
58# include <windows.h> 58# include <windows.h>
59#endif 59#endif
60 60
61#if !LL_DARWIN 61#if !LL_DARWIN && !LL_SOLARIS
62 62
63#ifdef PROCESSOR_FREQUENCY_MEASURE_AVAILABLE 63#ifdef PROCESSOR_FREQUENCY_MEASURE_AVAILABLE
64// We need the QueryPerformanceCounter and Sleep functions 64// We need the QueryPerformanceCounter and Sleep functions
@@ -255,24 +255,24 @@ bool CProcessor::AnalyzeIntelProcessor()
255 /* 0x03 */ "0.13 micron Intel Celeron", 255 /* 0x03 */ "0.13 micron Intel Celeron",
256 /* 0x04 */ "0.13 micron Intel Pentium III", 256 /* 0x04 */ "0.13 micron Intel Pentium III",
257 /* 0x05 */ "", 257 /* 0x05 */ "",
258 /* 0x06 */ "0.13 micron Intel Pentium III mobile", 258 /* 0x06 */ "0.13 micron Intel Pentium III Mobile",
259 /* 0x07 */ "0.13 micron Intel Celeron mobile", 259 /* 0x07 */ "0.13 micron Intel Celeron Mobile",
260 /* 0x08 */ "0.18 micron Intel Pentium 4", 260 /* 0x08 */ "0.18 micron Intel Pentium 4",
261 /* 0x09 */ "0.13 micron Intel Pentium 4", 261 /* 0x09 */ "0.13 micron Intel Pentium 4",
262 /* 0x0A */ "0.13 micron Intel Pentium 4", 262 /* 0x0A */ "0.13 micron Intel Celeron",
263 /* 0x0B */ "0.13 micron Intel Pentium 4 Xeon", 263 /* 0x0B */ "0.13 micron Intel Pentium 4 Xeon",
264 /* 0x0C */ "", 264 /* 0x0C */ "Intel Xeon MP",
265 /* 0x0D */ "", 265 /* 0x0D */ "",
266 /* 0x0E */ "0.18 micron Intel Pentium 4 Xeon", 266 /* 0x0E */ "0.18 micron Intel Pentium 4 Xeon",
267 /* 0x0F */ "", 267 /* 0x0F */ "Mobile Intel Celeron",
268 /* 0x10 */ "", 268 /* 0x10 */ "",
269 /* 0x11 */ "", 269 /* 0x11 */ "Mobile Genuine Intel",
270 /* 0x12 */ "Intel Celeron M", 270 /* 0x12 */ "Intel Celeron M",
271 /* 0x13 */ "mobile Intel Celeron", 271 /* 0x13 */ "Mobile Intel Celeron",
272 /* 0x14 */ "Intel Celeron", 272 /* 0x14 */ "Intel Celeron",
273 /* 0x15 */ "mobile Intel", 273 /* 0x15 */ "Mobile Genuine Intel",
274 /* 0x16 */ "Intel Pentium M", 274 /* 0x16 */ "Intel Pentium M",
275 /* 0x17 */ "mobile Intel Celeron", 275 /* 0x17 */ "Mobile Intel Celeron",
276 }; 276 };
277 277
278 // Only override the brand if we have it in the lookup table. We should 278 // Only override the brand if we have it in the lookup table. We should
@@ -300,7 +300,7 @@ bool CProcessor::AnalyzeIntelProcessor()
300 strcpy(CPUInfo.strFamily, "Intel Pentium"); /* Flawfinder: ignore */ 300 strcpy(CPUInfo.strFamily, "Intel Pentium"); /* Flawfinder: ignore */
301 break; 301 break;
302 case 6: // Family = 6: Pentium Pro (80686) processor family 302 case 6: // Family = 6: Pentium Pro (80686) processor family
303 strcpy(CPUInfo.strFamily, "Intel Pentium Pro"); /* Flawfinder: ignore */ 303 strcpy(CPUInfo.strFamily, "Intel Pentium Pro/2/3, Core"); /* Flawfinder: ignore */
304 break; 304 break;
305 case 15: // Family = 15: Extended family specific 305 case 15: // Family = 15: Extended family specific
306 // Masking the extended family 306 // Masking the extended family
@@ -447,17 +447,21 @@ bool CProcessor::AnalyzeIntelProcessor()
447 case 1: // Model = 8, Brand id = 1: Celeron (on-die L2 cache) processor model 447 case 1: // Model = 8, Brand id = 1: Celeron (on-die L2 cache) processor model
448 strncat(strCPUName, "Intel Celeron (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/ 448 strncat(strCPUName, "Intel Celeron (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
449 break; 449 break;
450 case 2: // Model = 8, Brand id = 2: Pentium III (on-die L2 cache) processor model (my current cpu :-)) 450 case 2: // Model = 8, Brand id = 2: Pentium III (on-die L2 cache) processor model (my current cpu :-))
451 strncat(strCPUName, "Intel Pentium III (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/ 451 strncat(strCPUName, "Intel Pentium III (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
452 break; 452 break;
453 case 3: // Model = 8, Brand id = 3: Pentium III Xeon (on-die L2 cache) processor model 453 case 3: // Model = 8, Brand id = 3: Pentium III Xeon (on-die L2 cache) processor model
454 strncat(strCPUName, "Intel Pentium III Xeon (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/ 454 strncat(strCPUName, "Intel Pentium III Xeon (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
455 break; 455 break;
456 default: // ... 456 default: // ...
457 strncat(strCPUName, "Intel Pentium III core (unknown model, 0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/ 457 strncat(strCPUName, "Intel Pentium III core (unknown model, 0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
458 break; 458 break;
459 } 459 }
460 break; 460 break;
461 case 9: // Model = 9: Intel Pentium M processor, Intel Celeron M processor, model 9
462 strcpy(CPUInfo.strModel, "Intel Pentium M Series Processor"); /*Flawfinder: ignore*/
463 strncat(strCPUName, "Intel Pentium M Series Processor", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
464 break;
461 case 0xA: // Model = 0xA: Pentium III/Xeon/Celeron (1 or 2 MB on-die L2 cache) processor model 465 case 0xA: // Model = 0xA: Pentium III/Xeon/Celeron (1 or 2 MB on-die L2 cache) processor model
462 strcpy(CPUInfo.strModel, "Intel Pentium III/Celeron/Pentium III Xeon - internal L2 cache, 0.18 micron"); /*Flawfinder: ignore*/ 466 strcpy(CPUInfo.strModel, "Intel Pentium III/Celeron/Pentium III Xeon - internal L2 cache, 0.18 micron"); /*Flawfinder: ignore*/
463 // Exact detection: 467 // Exact detection:
@@ -466,11 +470,11 @@ bool CProcessor::AnalyzeIntelProcessor()
466 case 1: // Model = 0xA, Brand id = 1: Celeron (1 or 2 MB on-die L2 cache (does it exist??)) processor model 470 case 1: // Model = 0xA, Brand id = 1: Celeron (1 or 2 MB on-die L2 cache (does it exist??)) processor model
467 strncat(strCPUName, "Intel Celeron (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/ 471 strncat(strCPUName, "Intel Celeron (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
468 break; 472 break;
469 case 2: // Model = 0xA, Brand id = 2: Pentium III (1 or 2 MB on-die L2 cache (never seen...)) processor model 473 case 2: // Model = 0xA, Brand id = 2: Pentium III (1 or 2 MB on-die L2 cache (never seen...)) processor model
470 strncat(strCPUName, "Intel Pentium III (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/ 474 strncat(strCPUName, "Intel Pentium III (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
471 break; 475 break;
472 case 3: // Model = 0xA, Brand id = 3: Pentium III Xeon (1 or 2 MB on-die L2 cache) processor model 476 case 3: // Model = 0xA, Brand id = 3: Pentium III Xeon (1 or 2 MB on-die L2 cache) processor model
473 strncat(strCPUName, "Intel Pentium III Xeon (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/ 477 strncat(strCPUName, "Intel Pentium III Xeon (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
474 break; 478 break;
475 default: // Getting bored of this............ 479 default: // Getting bored of this............
476 strncat(strCPUName, "Intel Pentium III core (unknown model, 0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/ 480 strncat(strCPUName, "Intel Pentium III core (unknown model, 0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
@@ -485,20 +489,32 @@ bool CProcessor::AnalyzeIntelProcessor()
485 case 3: // Model = 0xB, Brand id = 3: Celeron (Tualatin core) processor model 489 case 3: // Model = 0xB, Brand id = 3: Celeron (Tualatin core) processor model
486 strncat(strCPUName, "Intel Celeron (Tualatin core, 0.13 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/ 490 strncat(strCPUName, "Intel Celeron (Tualatin core, 0.13 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
487 break; 491 break;
488 case 4: // Model = 0xB, Brand id = 4: Pentium III (Tualatin core) processor model 492 case 4: // Model = 0xB, Brand id = 4: Pentium III (Tualatin core) processor model
489 strncat(strCPUName, "Intel Pentium III (Tualatin core, 0.13 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/ 493 strncat(strCPUName, "Intel Pentium III (Tualatin core, 0.13 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
490 break; 494 break;
491 case 7: // Model = 0xB, Brand id = 7: Celeron mobile (Tualatin core) processor model 495 case 7: // Model = 0xB, Brand id = 7: Celeron mobile (Tualatin core) processor model
492 strncat(strCPUName, "Intel Celeron mobile (Tualatin core, 0.13 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/ 496 strncat(strCPUName, "Intel Celeron mobile (Tualatin core, 0.13 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
493 break; 497 break;
494 default: // *bored* 498 default: // *bored*
495 strncat(strCPUName, "Intel Pentium III Tualatin core (unknown model, 0.13 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/ 499 strncat(strCPUName, "Intel Pentium III Tualatin core (unknown model, 0.13 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
496 break; 500 break;
497 } 501 }
498 break; 502 break;
503 case 0xD: // Model = 0xD: Intel Pentium M processor, Intel Celeron M processor, model D
504 strcpy(CPUInfo.strModel, "Intel Pentium M Series Processor"); /*Flawfinder: ignore*/
505 strncat(strCPUName, "Intel Pentium M Series Processor", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
506 break;
507 case 0xE: // Model = 0xE: Intel Core Duo processor, Intel Core Solo processor, model E
508 strcpy(CPUInfo.strModel, "Intel Core Series Processor"); /*Flawfinder: ignore*/
509 strncat(strCPUName, "Intel Core Series Processor", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
510 break;
511 case 0xF: // Model = 0xF: Intel Core 2 Duo processor, model F
512 strcpy(CPUInfo.strModel, "Intel Core 2 Series Processor"); /*Flawfinder: ignore*/
513 strncat(strCPUName, "Intel Core 2 Series Processor", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
514 break;
499 default: // *more bored* 515 default: // *more bored*
500 strcpy(CPUInfo.strModel, "Unknown Intel Pentium Pro"); /*Flawfinder: ignore*/ 516 strcpy(CPUInfo.strModel, "Unknown Intel Pentium Pro/2/3, Core"); /*Flawfinder: ignore*/
501 strncat(strCPUName, "Intel Pentium Pro (Unknown model)", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/ 517 strncat(strCPUName, "Intel Pentium Pro/2/3, Core (Unknown model)", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
502 break; 518 break;
503 } 519 }
504 break; 520 break;
@@ -1538,6 +1554,7 @@ void CProcessor::GetStandardProcessorExtensions()
1538 CPUInfo._Ext.FXSR_FastStreamingSIMD_ExtensionsSaveRestore = CheckBit(edxreg, 24); 1554 CPUInfo._Ext.FXSR_FastStreamingSIMD_ExtensionsSaveRestore = CheckBit(edxreg, 24);
1539 CPUInfo._Ext.SSE_StreamingSIMD_Extensions = CheckBit(edxreg, 25); 1555 CPUInfo._Ext.SSE_StreamingSIMD_Extensions = CheckBit(edxreg, 25);
1540 CPUInfo._Ext.SSE2_StreamingSIMD2_Extensions = CheckBit(edxreg, 26); 1556 CPUInfo._Ext.SSE2_StreamingSIMD2_Extensions = CheckBit(edxreg, 26);
1557 CPUInfo._Ext.Altivec_Extensions = false;
1541 CPUInfo._Ext.SS_SelfSnoop = CheckBit(edxreg, 27); 1558 CPUInfo._Ext.SS_SelfSnoop = CheckBit(edxreg, 27);
1542 CPUInfo._Ext.HT_HyperThreading = CheckBit(edxreg, 28); 1559 CPUInfo._Ext.HT_HyperThreading = CheckBit(edxreg, 28);
1543 CPUInfo._Ext.HT_HyterThreadingSiblings = (ebxreg >> 16) & 0xFF; 1560 CPUInfo._Ext.HT_HyterThreadingSiblings = (ebxreg >> 16) & 0xFF;
@@ -1643,6 +1660,125 @@ const ProcessorInfo *CProcessor::GetCPUInfo()
1643 return (&CPUInfo); 1660 return (&CPUInfo);
1644} 1661}
1645 1662
1663#elif LL_SOLARIS
1664#include <kstat.h>
1665
1666// ======================
1667// Class constructor:
1668/////////////////////////
1669CProcessor::CProcessor()
1670{
1671 uqwFrequency = 0;
1672 strCPUName[0] = 0;
1673 memset(&CPUInfo, 0, sizeof(CPUInfo));
1674}
1675
1676// unsigned __int64 CProcessor::GetCPUFrequency(unsigned int uiMeasureMSecs)
1677// =========================================================================
1678// Function to query the current CPU frequency
1679////////////////////////////////////////////////////////////////////////////
1680F64 CProcessor::GetCPUFrequency(unsigned int /*uiMeasureMSecs*/)
1681{
1682 if(uqwFrequency == 0){
1683 GetCPUInfo();
1684 }
1685
1686 return uqwFrequency;
1687}
1688
1689// const ProcessorInfo *CProcessor::GetCPUInfo()
1690// =============================================
1691// Calls all the other detection function to create an detailed
1692// processor information
1693///////////////////////////////////////////////////////////////
1694const ProcessorInfo *CProcessor::GetCPUInfo()
1695{
1696 // In Solaris the CPU info is in the kstats
1697 // try "psrinfo" or "kstat cpu_info" to see all
1698 // that's available
1699 int ncpus=0, i;
1700 kstat_ctl_t *kc;
1701 kstat_t *ks;
1702 kstat_named_t *ksinfo, *ksi;
1703 kstat_t *CPU_stats_list;
1704
1705 kc = kstat_open();
1706
1707 if((int)kc == -1){
1708 llwarns << "kstat_open(0 failed!" << llendl;
1709 return (&CPUInfo);
1710 }
1711
1712 for (ks = kc->kc_chain; ks != NULL; ks = ks->ks_next) {
1713 if (strncmp(ks->ks_module, "cpu_info", 8) == 0 &&
1714 strncmp(ks->ks_name, "cpu_info", 8) == 0)
1715 ncpus++;
1716 }
1717
1718 if(ncpus < 1){
1719 llwarns << "No cpus found in kstats!" << llendl;
1720 return (&CPUInfo);
1721 }
1722
1723 for (ks = kc->kc_chain; ks; ks = ks->ks_next) {
1724 if (strncmp(ks->ks_module, "cpu_info", 8) == 0
1725 && strncmp(ks->ks_name, "cpu_info", 8) == 0
1726 && kstat_read(kc, ks, NULL) != -1){
1727 CPU_stats_list = ks; // only looking at the first CPU
1728
1729 break;
1730 }
1731 }
1732
1733 if(ncpus > 1)
1734 snprintf(strCPUName, sizeof(strCPUName), "%d x ", ncpus);
1735
1736 kstat_read(kc, CPU_stats_list, NULL);
1737 ksinfo = (kstat_named_t *)CPU_stats_list->ks_data;
1738 for(i=0; i < (int)(CPU_stats_list->ks_ndata); ++i){ // Walk the kstats for this cpu gathering what we need
1739 ksi = ksinfo++;
1740 if(!strcmp(ksi->name, "brand")){
1741 strncat(strCPUName, (char *)KSTAT_NAMED_STR_PTR(ksi),
1742 sizeof(strCPUName)-strlen(strCPUName)-1);
1743 strncat(CPUInfo.strFamily, (char *)KSTAT_NAMED_STR_PTR(ksi),
1744 sizeof(CPUInfo.strFamily)-strlen(CPUInfo.strFamily)-1);
1745 strncpy(CPUInfo.strBrandID, strCPUName,sizeof(CPUInfo.strBrandID)-1);
1746 CPUInfo.strBrandID[sizeof(CPUInfo.strBrandID)-1]='\0';
1747 // DEBUG llinfos << "CPU brand: " << strCPUName << llendl;
1748 continue;
1749 }
1750
1751 if(!strcmp(ksi->name, "clock_MHz")){
1752#if defined(__sparc)
1753 llinfos << "Raw kstat clock rate is: " << ksi->value.l << llendl;
1754 uqwFrequency = (F64)(ksi->value.l * 1000000);
1755#else
1756 uqwFrequency = (F64)(ksi->value.i64 * 1000000);
1757#endif
1758 //DEBUG llinfos << "CPU frequency: " << uqwFrequency << llendl;
1759 continue;
1760 }
1761
1762#if defined(__i386)
1763 if(!strcmp(ksi->name, "vendor_id")){
1764 strncpy(CPUInfo.strVendor, (char *)KSTAT_NAMED_STR_PTR(ksi), sizeof(CPUInfo.strVendor)-1);
1765 // DEBUG llinfos << "CPU vendor: " << CPUInfo.strVendor << llendl;
1766 continue;
1767 }
1768#endif
1769 }
1770
1771 kstat_close(kc);
1772
1773#if defined(__sparc) // SPARC does not define a vendor string in kstat
1774 strncpy(CPUInfo.strVendor, "Sun Microsystems, Inc.", sizeof(CPUInfo.strVendor)-1);
1775#endif
1776
1777 // DEBUG llinfo << "The system has " << ncpus << " CPUs with a clock rate of " << uqwFrequency << "MHz." << llendl;
1778
1779 return (&CPUInfo);
1780}
1781
1646#else 1782#else
1647// LL_DARWIN 1783// LL_DARWIN
1648 1784
@@ -1891,11 +2027,12 @@ const ProcessorInfo *CProcessor::GetCPUInfo()
1891 break; 2027 break;
1892 } 2028 }
1893 2029
1894 // It's kinda like MMX or SSE...
1895 CPUInfo._Ext.EMMX_MultimediaExtensions = 2030 CPUInfo._Ext.EMMX_MultimediaExtensions =
1896 CPUInfo._Ext.MMX_MultimediaExtensions = 2031 CPUInfo._Ext.MMX_MultimediaExtensions =
1897 CPUInfo._Ext.SSE_StreamingSIMD_Extensions = 2032 CPUInfo._Ext.SSE_StreamingSIMD_Extensions =
1898 CPUInfo._Ext.SSE2_StreamingSIMD2_Extensions = hasFeature("hw.optional.altivec"); 2033 CPUInfo._Ext.SSE2_StreamingSIMD2_Extensions = false;
2034
2035 CPUInfo._Ext.Altivec_Extensions = hasFeature("hw.optional.altivec");
1899 2036
1900#endif 2037#endif
1901 2038
@@ -1912,6 +2049,7 @@ const ProcessorInfo *CProcessor::GetCPUInfo()
1912 CPUInfo._Ext.MMX_MultimediaExtensions = hasFeature("hw.optional.mmx"); 2049 CPUInfo._Ext.MMX_MultimediaExtensions = hasFeature("hw.optional.mmx");
1913 CPUInfo._Ext.SSE_StreamingSIMD_Extensions = hasFeature("hw.optional.sse"); 2050 CPUInfo._Ext.SSE_StreamingSIMD_Extensions = hasFeature("hw.optional.sse");
1914 CPUInfo._Ext.SSE2_StreamingSIMD2_Extensions = hasFeature("hw.optional.sse2"); 2051 CPUInfo._Ext.SSE2_StreamingSIMD2_Extensions = hasFeature("hw.optional.sse2");
2052 CPUInfo._Ext.Altivec_Extensions = false;
1915 CPUInfo._Ext.AA64_AMD64BitArchitecture = hasFeature("hw.optional.x86_64"); 2053 CPUInfo._Ext.AA64_AMD64BitArchitecture = hasFeature("hw.optional.x86_64");
1916 2054
1917#endif 2055#endif
@@ -2015,6 +2153,7 @@ bool CProcessor::CPUInfoToText(char *strBuffer, unsigned int uiMaxLen)
2015 { 2153 {
2016 COPYADD("Processor Serial: Disabled\n"); 2154 COPYADD("Processor Serial: Disabled\n");
2017 } 2155 }
2156#if !LL_SOLARIS // NOTE: Why bother printing all this when it's irrelavent
2018 2157
2019 COPYADD("\n\n// CPU Configuration\n////////////////////\n"); 2158 COPYADD("\n\n// CPU Configuration\n////////////////////\n");
2020 FORMATADD("L1 instruction cache: %s\n", CPUInfo._L1.Instruction.strCache); 2159 FORMATADD("L1 instruction cache: %s\n", CPUInfo._L1.Instruction.strCache);
@@ -2065,12 +2204,13 @@ bool CProcessor::CPUInfoToText(char *strBuffer, unsigned int uiMaxLen)
2065 BOOLADD("SS Self Snoop: ", CPUInfo._Ext.SS_SelfSnoop); 2204 BOOLADD("SS Self Snoop: ", CPUInfo._Ext.SS_SelfSnoop);
2066 BOOLADD("SSE Streaming SIMD Extensions: ", CPUInfo._Ext.SSE_StreamingSIMD_Extensions); 2205 BOOLADD("SSE Streaming SIMD Extensions: ", CPUInfo._Ext.SSE_StreamingSIMD_Extensions);
2067 BOOLADD("SSE2 Streaming SIMD 2 Extensions: ", CPUInfo._Ext.SSE2_StreamingSIMD2_Extensions); 2206 BOOLADD("SSE2 Streaming SIMD 2 Extensions: ", CPUInfo._Ext.SSE2_StreamingSIMD2_Extensions);
2207 BOOLADD("ALTVEC Altivec Extensions: ", CPUInfo._Ext.Altivec_Extensions);
2068 BOOLADD("TM Thermal Monitor: ", CPUInfo._Ext.TM_ThermalMonitor); 2208 BOOLADD("TM Thermal Monitor: ", CPUInfo._Ext.TM_ThermalMonitor);
2069 BOOLADD("TSC Time Stamp Counter: ", CPUInfo._Ext.TSC_TimeStampCounter); 2209 BOOLADD("TSC Time Stamp Counter: ", CPUInfo._Ext.TSC_TimeStampCounter);
2070 BOOLADD("VME Virtual 8086 Mode Enhancements: ", CPUInfo._Ext.VME_Virtual8086ModeEnhancements); 2210 BOOLADD("VME Virtual 8086 Mode Enhancements: ", CPUInfo._Ext.VME_Virtual8086ModeEnhancements);
2071 BOOLADD("3DNow! Instructions: ", CPUInfo._Ext._3DNOW_InstructionExtensions); 2211 BOOLADD("3DNow! Instructions: ", CPUInfo._Ext._3DNOW_InstructionExtensions);
2072 BOOLADD("Enhanced 3DNow! Instructions: ", CPUInfo._Ext._E3DNOW_InstructionExtensions); 2212 BOOLADD("Enhanced 3DNow! Instructions: ", CPUInfo._Ext._E3DNOW_InstructionExtensions);
2073 2213#endif
2074 // Yippie!!! 2214 // Yippie!!!
2075 return true; 2215 return true;
2076} 2216}