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1/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
2 Note: I added some stuff for use with gnupg
3
4Copyright (C) 1991, 1992, 1993, 1994, 1996, 1998,
5 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
6
7This file is free software; you can redistribute it and/or modify
8it under the terms of the GNU Lesser General Public License as published by
9the Free Software Foundation; either version 2.1 of the License, or (at your
10option) any later version.
11
12This file is distributed in the hope that it will be useful, but
13WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
15License for more details.
16
17You should have received a copy of the GNU Library General Public License
18along with this file; see the file COPYING.LIB. If not, write to
19the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20MA 02111-1307, USA. */
21
22/* You have to define the following before including this file:
23
24 UWtype -- An unsigned type, default type for operations (typically a "word")
25 UHWtype -- An unsigned type, at least half the size of UWtype.
26 UDWtype -- An unsigned type, at least twice as large a UWtype
27 W_TYPE_SIZE -- size in bits of UWtype
28
29 SItype, USItype -- Signed and unsigned 32 bit types.
30 DItype, UDItype -- Signed and unsigned 64 bit types.
31
32 On a 32 bit machine UWtype should typically be USItype;
33 on a 64 bit machine, UWtype should typically be UDItype.
34*/
35
36#define __BITS4 (W_TYPE_SIZE / 4)
37#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
38#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
39#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
40
41/* This is used to make sure no undesirable sharing between different libraries
42 that use this file takes place. */
43#ifndef __MPN
44#define __MPN(x) __##x
45#endif
46
47/* Define auxiliary asm macros.
48
49 1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
50 UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
51 word product in HIGH_PROD and LOW_PROD.
52
53 2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
54 UDWtype product. This is just a variant of umul_ppmm.
55
56 3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
57 denominator) divides a UDWtype, composed by the UWtype integers
58 HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
59 in QUOTIENT and the remainder in REMAINDER. HIGH_NUMERATOR must be less
60 than DENOMINATOR for correct operation. If, in addition, the most
61 significant bit of DENOMINATOR must be 1, then the pre-processor symbol
62 UDIV_NEEDS_NORMALIZATION is defined to 1.
63
64 4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
65 denominator). Like udiv_qrnnd but the numbers are signed. The quotient
66 is rounded towards 0.
67
68 5) count_leading_zeros(count, x) counts the number of zero-bits from the
69 msb to the first non-zero bit in the UWtype X. This is the number of
70 steps X needs to be shifted left to set the msb. Undefined for X == 0,
71 unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
72
73 6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
74 from the least significant end.
75
76 7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
77 high_addend_2, low_addend_2) adds two UWtype integers, composed by
78 HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
79 respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow
80 (i.e. carry out) is not stored anywhere, and is lost.
81
82 8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
83 high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
84 composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
85 LOW_SUBTRAHEND_2 respectively. The result is placed in HIGH_DIFFERENCE
86 and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere,
87 and is lost.
88
89 If any of these macros are left undefined for a particular CPU,
90 C macros are used. */
91
92/* The CPUs come in alphabetical order below.
93
94 Please add support for more CPUs here, or improve the current support
95 for the CPUs below! */
96
97#ifdef __riscos__
98#pragma continue_after_hash_error
99#else /* !__riscos__ */
100#if defined (__GNUC__) && !defined (NO_ASM)
101
102/* We sometimes need to clobber "cc" with gcc2, but that would not be
103 understood by gcc1. Use cpp to avoid major code duplication. */
104#if __GNUC__ < 2
105#define __CLOBBER_CC
106#define __AND_CLOBBER_CC
107#else /* __GNUC__ >= 2 */
108#define __CLOBBER_CC : "cc"
109#define __AND_CLOBBER_CC , "cc"
110#endif /* __GNUC__ < 2 */
111
112
113/***************************************
114 ************** A29K *****************
115 ***************************************/
116#if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
117#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
118 __asm__ ("add %1,%4,%5\n" \
119 "addc %0,%2,%3" \
120 : "=r" ((USItype)(sh)), \
121 "=&r" ((USItype)(sl)) \
122 : "%r" ((USItype)(ah)), \
123 "rI" ((USItype)(bh)), \
124 "%r" ((USItype)(al)), \
125 "rI" ((USItype)(bl)))
126#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
127 __asm__ ("sub %1,%4,%5\n" \
128 "subc %0,%2,%3" \
129 : "=r" ((USItype)(sh)), \
130 "=&r" ((USItype)(sl)) \
131 : "r" ((USItype)(ah)), \
132 "rI" ((USItype)(bh)), \
133 "r" ((USItype)(al)), \
134 "rI" ((USItype)(bl)))
135#define umul_ppmm(xh, xl, m0, m1) \
136 do { \
137 USItype __m0 = (m0), __m1 = (m1); \
138 __asm__ ("multiplu %0,%1,%2" \
139 : "=r" ((USItype)(xl)) \
140 : "r" (__m0), \
141 "r" (__m1)); \
142 __asm__ ("multmu %0,%1,%2" \
143 : "=r" ((USItype)(xh)) \
144 : "r" (__m0), \
145 "r" (__m1)); \
146 } while (0)
147#define udiv_qrnnd(q, r, n1, n0, d) \
148 __asm__ ("dividu %0,%3,%4" \
149 : "=r" ((USItype)(q)), \
150 "=q" ((USItype)(r)) \
151 : "1" ((USItype)(n1)), \
152 "r" ((USItype)(n0)), \
153 "r" ((USItype)(d)))
154#define count_leading_zeros(count, x) \
155 __asm__ ("clz %0,%1" \
156 : "=r" ((USItype)(count)) \
157 : "r" ((USItype)(x)))
158#define COUNT_LEADING_ZEROS_0 32
159#endif /* __a29k__ */
160
161
162#if defined (__alpha) && W_TYPE_SIZE == 64
163#define umul_ppmm(ph, pl, m0, m1) \
164 do { \
165 UDItype __m0 = (m0), __m1 = (m1); \
166 __asm__ ("umulh %r1,%2,%0" \
167 : "=r" ((UDItype) ph) \
168 : "%rJ" (__m0), \
169 "rI" (__m1)); \
170 (pl) = __m0 * __m1; \
171 } while (0)
172#define UMUL_TIME 46
173#ifndef LONGLONG_STANDALONE
174#define udiv_qrnnd(q, r, n1, n0, d) \
175 do { UDItype __r; \
176 (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \
177 (r) = __r; \
178 } while (0)
179extern UDItype __udiv_qrnnd ();
180#define UDIV_TIME 220
181#endif /* LONGLONG_STANDALONE */
182#endif /* __alpha */
183
184/***************************************
185 ************** ARM ******************
186 ***************************************/
187#if defined (__arm__) && W_TYPE_SIZE == 32
188#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
189 __asm__ ("adds %1, %4, %5\n" \
190 "adc %0, %2, %3" \
191 : "=r" ((USItype)(sh)), \
192 "=&r" ((USItype)(sl)) \
193 : "%r" ((USItype)(ah)), \
194 "rI" ((USItype)(bh)), \
195 "%r" ((USItype)(al)), \
196 "rI" ((USItype)(bl)))
197#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
198 __asm__ ("subs %1, %4, %5\n" \
199 "sbc %0, %2, %3" \
200 : "=r" ((USItype)(sh)), \
201 "=&r" ((USItype)(sl)) \
202 : "r" ((USItype)(ah)), \
203 "rI" ((USItype)(bh)), \
204 "r" ((USItype)(al)), \
205 "rI" ((USItype)(bl)))
206#if defined __ARM_ARCH_2__ || defined __ARM_ARCH_3__
207#define umul_ppmm(xh, xl, a, b) \
208 __asm__ ("%@ Inlined umul_ppmm\n" \
209 "mov %|r0, %2, lsr #16 @ AAAA\n" \
210 "mov %|r2, %3, lsr #16 @ BBBB\n" \
211 "bic %|r1, %2, %|r0, lsl #16 @ aaaa\n" \
212 "bic %0, %3, %|r2, lsl #16 @ bbbb\n" \
213 "mul %1, %|r1, %|r2 @ aaaa * BBBB\n" \
214 "mul %|r2, %|r0, %|r2 @ AAAA * BBBB\n" \
215 "mul %|r1, %0, %|r1 @ aaaa * bbbb\n" \
216 "mul %0, %|r0, %0 @ AAAA * bbbb\n" \
217 "adds %|r0, %1, %0 @ central sum\n" \
218 "addcs %|r2, %|r2, #65536\n" \
219 "adds %1, %|r1, %|r0, lsl #16\n" \
220 "adc %0, %|r2, %|r0, lsr #16" \
221 : "=&r" ((USItype)(xh)), \
222 "=r" ((USItype)(xl)) \
223 : "r" ((USItype)(a)), \
224 "r" ((USItype)(b)) \
225 : "r0", "r1", "r2")
226#else
227#define umul_ppmm(xh, xl, a, b) \
228 __asm__ ("%@ Inlined umul_ppmm\n" \
229 "umull %r1, %r0, %r2, %r3" \
230 : "=&r" ((USItype)(xh)), \
231 "=r" ((USItype)(xl)) \
232 : "r" ((USItype)(a)), \
233 "r" ((USItype)(b)) \
234 : "r0", "r1")
235#endif
236#define UMUL_TIME 20
237#define UDIV_TIME 100
238#endif /* __arm__ */
239
240/***************************************
241 ************** CLIPPER **************
242 ***************************************/
243#if defined (__clipper__) && W_TYPE_SIZE == 32
244#define umul_ppmm(w1, w0, u, v) \
245 ({union {UDItype __ll; \
246 struct {USItype __l, __h;} __i; \
247 } __xx; \
248 __asm__ ("mulwux %2,%0" \
249 : "=r" (__xx.__ll) \
250 : "%0" ((USItype)(u)), \
251 "r" ((USItype)(v))); \
252 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
253#define smul_ppmm(w1, w0, u, v) \
254 ({union {DItype __ll; \
255 struct {SItype __l, __h;} __i; \
256 } __xx; \
257 __asm__ ("mulwx %2,%0" \
258 : "=r" (__xx.__ll) \
259 : "%0" ((SItype)(u)), \
260 "r" ((SItype)(v))); \
261 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
262#define __umulsidi3(u, v) \
263 ({UDItype __w; \
264 __asm__ ("mulwux %2,%0" \
265 : "=r" (__w) \
266 : "%0" ((USItype)(u)), \
267 "r" ((USItype)(v))); \
268 __w; })
269#endif /* __clipper__ */
270
271
272/***************************************
273 ************** GMICRO ***************
274 ***************************************/
275#if defined (__gmicro__) && W_TYPE_SIZE == 32
276#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
277 __asm__ ("add.w %5,%1\n" \
278 "addx %3,%0" \
279 : "=g" ((USItype)(sh)), \
280 "=&g" ((USItype)(sl)) \
281 : "%0" ((USItype)(ah)), \
282 "g" ((USItype)(bh)), \
283 "%1" ((USItype)(al)), \
284 "g" ((USItype)(bl)))
285#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
286 __asm__ ("sub.w %5,%1\n" \
287 "subx %3,%0" \
288 : "=g" ((USItype)(sh)), \
289 "=&g" ((USItype)(sl)) \
290 : "0" ((USItype)(ah)), \
291 "g" ((USItype)(bh)), \
292 "1" ((USItype)(al)), \
293 "g" ((USItype)(bl)))
294#define umul_ppmm(ph, pl, m0, m1) \
295 __asm__ ("mulx %3,%0,%1" \
296 : "=g" ((USItype)(ph)), \
297 "=r" ((USItype)(pl)) \
298 : "%0" ((USItype)(m0)), \
299 "g" ((USItype)(m1)))
300#define udiv_qrnnd(q, r, nh, nl, d) \
301 __asm__ ("divx %4,%0,%1" \
302 : "=g" ((USItype)(q)), \
303 "=r" ((USItype)(r)) \
304 : "1" ((USItype)(nh)), \
305 "0" ((USItype)(nl)), \
306 "g" ((USItype)(d)))
307#define count_leading_zeros(count, x) \
308 __asm__ ("bsch/1 %1,%0" \
309 : "=g" (count) \
310 : "g" ((USItype)(x)), \
311 "0" ((USItype)0))
312#endif
313
314
315/***************************************
316 ************** HPPA *****************
317 ***************************************/
318#if defined (__hppa) && W_TYPE_SIZE == 32
319#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
320 __asm__ (" add %4,%5,%1\n" \
321 " addc %2,%3,%0" \
322 : "=r" ((USItype)(sh)), \
323 "=&r" ((USItype)(sl)) \
324 : "%rM" ((USItype)(ah)), \
325 "rM" ((USItype)(bh)), \
326 "%rM" ((USItype)(al)), \
327 "rM" ((USItype)(bl)))
328#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
329 __asm__ (" sub %4,%5,%1\n" \
330 " subb %2,%3,%0" \
331 : "=r" ((USItype)(sh)), \
332 "=&r" ((USItype)(sl)) \
333 : "rM" ((USItype)(ah)), \
334 "rM" ((USItype)(bh)), \
335 "rM" ((USItype)(al)), \
336 "rM" ((USItype)(bl)))
337#if defined (_PA_RISC1_1)
338#define umul_ppmm(wh, wl, u, v) \
339 do { \
340 union {UDItype __ll; \
341 struct {USItype __h, __l;} __i; \
342 } __xx; \
343 __asm__ (" xmpyu %1,%2,%0" \
344 : "=*f" (__xx.__ll) \
345 : "*f" ((USItype)(u)), \
346 "*f" ((USItype)(v))); \
347 (wh) = __xx.__i.__h; \
348 (wl) = __xx.__i.__l; \
349 } while (0)
350#define UMUL_TIME 8
351#define UDIV_TIME 60
352#else
353#define UMUL_TIME 40
354#define UDIV_TIME 80
355#endif
356#ifndef LONGLONG_STANDALONE
357#define udiv_qrnnd(q, r, n1, n0, d) \
358 do { USItype __r; \
359 (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \
360 (r) = __r; \
361 } while (0)
362extern USItype __udiv_qrnnd ();
363#endif /* LONGLONG_STANDALONE */
364#define count_leading_zeros(count, x) \
365 do { \
366 USItype __tmp; \
367 __asm__ ( \
368 " ldi 1,%0 \n" \
369 " extru,= %1,15,16,%%r0 ; Bits 31..16 zero? \n" \
370 " extru,tr %1,15,16,%1 ; No. Shift down, skip add.\n" \
371 " ldo 16(%0),%0 ; Yes. Perform add. \n" \
372 " extru,= %1,23,8,%%r0 ; Bits 15..8 zero? \n" \
373 " extru,tr %1,23,8,%1 ; No. Shift down, skip add.\n" \
374 " ldo 8(%0),%0 ; Yes. Perform add. \n" \
375 " extru,= %1,27,4,%%r0 ; Bits 7..4 zero? \n" \
376 " extru,tr %1,27,4,%1 ; No. Shift down, skip add.\n" \
377 " ldo 4(%0),%0 ; Yes. Perform add. \n" \
378 " extru,= %1,29,2,%%r0 ; Bits 3..2 zero? \n" \
379 " extru,tr %1,29,2,%1 ; No. Shift down, skip add.\n" \
380 " ldo 2(%0),%0 ; Yes. Perform add. \n" \
381 " extru %1,30,1,%1 ; Extract bit 1. \n" \
382 " sub %0,%1,%0 ; Subtract it. " \
383 : "=r" (count), "=r" (__tmp) : "1" (x)); \
384 } while (0)
385#endif /* hppa */
386
387
388/***************************************
389 ************** I370 *****************
390 ***************************************/
391#if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
392#define umul_ppmm(xh, xl, m0, m1) \
393 do { \
394 union {UDItype __ll; \
395 struct {USItype __h, __l;} __i; \
396 } __xx; \
397 USItype __m0 = (m0), __m1 = (m1); \
398 __asm__ ("mr %0,%3" \
399 : "=r" (__xx.__i.__h), \
400 "=r" (__xx.__i.__l) \
401 : "%1" (__m0), \
402 "r" (__m1)); \
403 (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
404 (xh) += ((((SItype) __m0 >> 31) & __m1) \
405 + (((SItype) __m1 >> 31) & __m0)); \
406 } while (0)
407#define smul_ppmm(xh, xl, m0, m1) \
408 do { \
409 union {DItype __ll; \
410 struct {USItype __h, __l;} __i; \
411 } __xx; \
412 __asm__ ("mr %0,%3" \
413 : "=r" (__xx.__i.__h), \
414 "=r" (__xx.__i.__l) \
415 : "%1" (m0), \
416 "r" (m1)); \
417 (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
418 } while (0)
419#define sdiv_qrnnd(q, r, n1, n0, d) \
420 do { \
421 union {DItype __ll; \
422 struct {USItype __h, __l;} __i; \
423 } __xx; \
424 __xx.__i.__h = n1; __xx.__i.__l = n0; \
425 __asm__ ("dr %0,%2" \
426 : "=r" (__xx.__ll) \
427 : "0" (__xx.__ll), "r" (d)); \
428 (q) = __xx.__i.__l; (r) = __xx.__i.__h; \
429 } while (0)
430#endif
431
432
433/***************************************
434 ************** I386 *****************
435 ***************************************/
436#if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
437#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
438 __asm__ ("addl %5,%1\n" \
439 "adcl %3,%0" \
440 : "=r" ((USItype)(sh)), \
441 "=&r" ((USItype)(sl)) \
442 : "%0" ((USItype)(ah)), \
443 "g" ((USItype)(bh)), \
444 "%1" ((USItype)(al)), \
445 "g" ((USItype)(bl)))
446#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
447 __asm__ ("subl %5,%1\n" \
448 "sbbl %3,%0" \
449 : "=r" ((USItype)(sh)), \
450 "=&r" ((USItype)(sl)) \
451 : "0" ((USItype)(ah)), \
452 "g" ((USItype)(bh)), \
453 "1" ((USItype)(al)), \
454 "g" ((USItype)(bl)))
455#define umul_ppmm(w1, w0, u, v) \
456 __asm__ ("mull %3" \
457 : "=a" ((USItype)(w0)), \
458 "=d" ((USItype)(w1)) \
459 : "%0" ((USItype)(u)), \
460 "rm" ((USItype)(v)))
461#define udiv_qrnnd(q, r, n1, n0, d) \
462 __asm__ ("divl %4" \
463 : "=a" ((USItype)(q)), \
464 "=d" ((USItype)(r)) \
465 : "0" ((USItype)(n0)), \
466 "1" ((USItype)(n1)), \
467 "rm" ((USItype)(d)))
468#define count_leading_zeros(count, x) \
469 do { \
470 USItype __cbtmp; \
471 __asm__ ("bsrl %1,%0" \
472 : "=r" (__cbtmp) : "rm" ((USItype)(x))); \
473 (count) = __cbtmp ^ 31; \
474 } while (0)
475#define count_trailing_zeros(count, x) \
476 __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
477#ifndef UMUL_TIME
478#define UMUL_TIME 40
479#endif
480#ifndef UDIV_TIME
481#define UDIV_TIME 40
482#endif
483#endif /* 80x86 */
484
485
486/***************************************
487 ************** I860 *****************
488 ***************************************/
489#if defined (__i860__) && W_TYPE_SIZE == 32
490#define rshift_rhlc(r,h,l,c) \
491 __asm__ ("shr %3,r0,r0\n" \
492 "shrd %1,%2,%0" \
493 "=r" (r) : "r" (h), "r" (l), "rn" (c))
494#endif /* i860 */
495
496/***************************************
497 ************** I960 *****************
498 ***************************************/
499#if defined (__i960__) && W_TYPE_SIZE == 32
500#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
501 __asm__ ("cmpo 1,0\n" \
502 "addc %5,%4,%1\n" \
503 "addc %3,%2,%0" \
504 : "=r" ((USItype)(sh)), \
505 "=&r" ((USItype)(sl)) \
506 : "%dI" ((USItype)(ah)), \
507 "dI" ((USItype)(bh)), \
508 "%dI" ((USItype)(al)), \
509 "dI" ((USItype)(bl)))
510#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
511 __asm__ ("cmpo 0,0\n" \
512 "subc %5,%4,%1\n" \
513 "subc %3,%2,%0" \
514 : "=r" ((USItype)(sh)), \
515 "=&r" ((USItype)(sl)) \
516 : "dI" ((USItype)(ah)), \
517 "dI" ((USItype)(bh)), \
518 "dI" ((USItype)(al)), \
519 "dI" ((USItype)(bl)))
520#define umul_ppmm(w1, w0, u, v) \
521 ({union {UDItype __ll; \
522 struct {USItype __l, __h;} __i; \
523 } __xx; \
524 __asm__ ("emul %2,%1,%0" \
525 : "=d" (__xx.__ll) \
526 : "%dI" ((USItype)(u)), \
527 "dI" ((USItype)(v))); \
528 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
529#define __umulsidi3(u, v) \
530 ({UDItype __w; \
531 __asm__ ("emul %2,%1,%0" \
532 : "=d" (__w) \
533 : "%dI" ((USItype)(u)), \
534 "dI" ((USItype)(v))); \
535 __w; })
536#define udiv_qrnnd(q, r, nh, nl, d) \
537 do { \
538 union {UDItype __ll; \
539 struct {USItype __l, __h;} __i; \
540 } __nn; \
541 __nn.__i.__h = (nh); __nn.__i.__l = (nl); \
542 __asm__ ("ediv %d,%n,%0" \
543 : "=d" (__rq.__ll) \
544 : "dI" (__nn.__ll), \
545 "dI" ((USItype)(d))); \
546 (r) = __rq.__i.__l; (q) = __rq.__i.__h; \
547 } while (0)
548#define count_leading_zeros(count, x) \
549 do { \
550 USItype __cbtmp; \
551 __asm__ ("scanbit %1,%0" \
552 : "=r" (__cbtmp) \
553 : "r" ((USItype)(x))); \
554 (count) = __cbtmp ^ 31; \
555 } while (0)
556#define COUNT_LEADING_ZEROS_0 (-32) /* sic */
557#if defined (__i960mx) /* what is the proper symbol to test??? */
558#define rshift_rhlc(r,h,l,c) \
559 do { \
560 union {UDItype __ll; \
561 struct {USItype __l, __h;} __i; \
562 } __nn; \
563 __nn.__i.__h = (h); __nn.__i.__l = (l); \
564 __asm__ ("shre %2,%1,%0" \
565 : "=d" (r) : "dI" (__nn.__ll), "dI" (c)); \
566 }
567#endif /* i960mx */
568#endif /* i960 */
569
570
571/***************************************
572 ************** 68000 ****************
573 ***************************************/
574#if (defined (__mc68000__) || defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
575#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
576 __asm__ ("add%.l %5,%1\n" \
577 "addx%.l %3,%0" \
578 : "=d" ((USItype)(sh)), \
579 "=&d" ((USItype)(sl)) \
580 : "%0" ((USItype)(ah)), \
581 "d" ((USItype)(bh)), \
582 "%1" ((USItype)(al)), \
583 "g" ((USItype)(bl)))
584#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
585 __asm__ ("sub%.l %5,%1\n" \
586 "subx%.l %3,%0" \
587 : "=d" ((USItype)(sh)), \
588 "=&d" ((USItype)(sl)) \
589 : "0" ((USItype)(ah)), \
590 "d" ((USItype)(bh)), \
591 "1" ((USItype)(al)), \
592 "g" ((USItype)(bl)))
593#if (defined (__mc68020__) || defined (__NeXT__) || defined(mc68020))
594#define umul_ppmm(w1, w0, u, v) \
595 __asm__ ("mulu%.l %3,%1:%0" \
596 : "=d" ((USItype)(w0)), \
597 "=d" ((USItype)(w1)) \
598 : "%0" ((USItype)(u)), \
599 "dmi" ((USItype)(v)))
600#define UMUL_TIME 45
601#define udiv_qrnnd(q, r, n1, n0, d) \
602 __asm__ ("divu%.l %4,%1:%0" \
603 : "=d" ((USItype)(q)), \
604 "=d" ((USItype)(r)) \
605 : "0" ((USItype)(n0)), \
606 "1" ((USItype)(n1)), \
607 "dmi" ((USItype)(d)))
608#define UDIV_TIME 90
609#define sdiv_qrnnd(q, r, n1, n0, d) \
610 __asm__ ("divs%.l %4,%1:%0" \
611 : "=d" ((USItype)(q)), \
612 "=d" ((USItype)(r)) \
613 : "0" ((USItype)(n0)), \
614 "1" ((USItype)(n1)), \
615 "dmi" ((USItype)(d)))
616#define count_leading_zeros(count, x) \
617 __asm__ ("bfffo %1{%b2:%b2},%0" \
618 : "=d" ((USItype)(count)) \
619 : "od" ((USItype)(x)), "n" (0))
620#define COUNT_LEADING_ZEROS_0 32
621#else /* not mc68020 */
622#define umul_ppmm(xh, xl, a, b) \
623 do { USItype __umul_tmp1, __umul_tmp2; \
624 __asm__ ("| Inlined umul_ppmm \n" \
625 " move%.l %5,%3 \n" \
626 " move%.l %2,%0 \n" \
627 " move%.w %3,%1 \n" \
628 " swap %3 \n" \
629 " swap %0 \n" \
630 " mulu %2,%1 \n" \
631 " mulu %3,%0 \n" \
632 " mulu %2,%3 \n" \
633 " swap %2 \n" \
634 " mulu %5,%2 \n" \
635 " add%.l %3,%2 \n" \
636 " jcc 1f \n" \
637 " add%.l %#0x10000,%0 \n" \
638 "1: move%.l %2,%3 \n" \
639 " clr%.w %2 \n" \
640 " swap %2 \n" \
641 " swap %3 \n" \
642 " clr%.w %3 \n" \
643 " add%.l %3,%1 \n" \
644 " addx%.l %2,%0 \n" \
645 " | End inlined umul_ppmm" \
646 : "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)), \
647 "=d" (__umul_tmp1), "=&d" (__umul_tmp2) \
648 : "%2" ((USItype)(a)), "d" ((USItype)(b))); \
649 } while (0)
650#define UMUL_TIME 100
651#define UDIV_TIME 400
652#endif /* not mc68020 */
653#endif /* mc68000 */
654
655
656/***************************************
657 ************** 88000 ****************
658 ***************************************/
659#if defined (__m88000__) && W_TYPE_SIZE == 32
660#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
661 __asm__ ("addu.co %1,%r4,%r5\n" \
662 "addu.ci %0,%r2,%r3" \
663 : "=r" ((USItype)(sh)), \
664 "=&r" ((USItype)(sl)) \
665 : "%rJ" ((USItype)(ah)), \
666 "rJ" ((USItype)(bh)), \
667 "%rJ" ((USItype)(al)), \
668 "rJ" ((USItype)(bl)))
669#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
670 __asm__ ("subu.co %1,%r4,%r5\n" \
671 "subu.ci %0,%r2,%r3" \
672 : "=r" ((USItype)(sh)), \
673 "=&r" ((USItype)(sl)) \
674 : "rJ" ((USItype)(ah)), \
675 "rJ" ((USItype)(bh)), \
676 "rJ" ((USItype)(al)), \
677 "rJ" ((USItype)(bl)))
678#define count_leading_zeros(count, x) \
679 do { \
680 USItype __cbtmp; \
681 __asm__ ("ff1 %0,%1" \
682 : "=r" (__cbtmp) \
683 : "r" ((USItype)(x))); \
684 (count) = __cbtmp ^ 31; \
685 } while (0)
686#define COUNT_LEADING_ZEROS_0 63 /* sic */
687#if defined (__m88110__)
688#define umul_ppmm(wh, wl, u, v) \
689 do { \
690 union {UDItype __ll; \
691 struct {USItype __h, __l;} __i; \
692 } __x; \
693 __asm__ ("mulu.d %0,%1,%2" : "=r" (__x.__ll) : "r" (u), "r" (v)); \
694 (wh) = __x.__i.__h; \
695 (wl) = __x.__i.__l; \
696 } while (0)
697#define udiv_qrnnd(q, r, n1, n0, d) \
698 ({union {UDItype __ll; \
699 struct {USItype __h, __l;} __i; \
700 } __x, __q; \
701 __x.__i.__h = (n1); __x.__i.__l = (n0); \
702 __asm__ ("divu.d %0,%1,%2" \
703 : "=r" (__q.__ll) : "r" (__x.__ll), "r" (d)); \
704 (r) = (n0) - __q.__l * (d); (q) = __q.__l; })
705#define UMUL_TIME 5
706#define UDIV_TIME 25
707#else
708#define UMUL_TIME 17
709#define UDIV_TIME 150
710#endif /* __m88110__ */
711#endif /* __m88000__ */
712
713/***************************************
714 ************** MIPS *****************
715 ***************************************/
716#if defined (__mips__) && W_TYPE_SIZE == 32
717#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
718#define umul_ppmm(w1, w0, u, v) \
719 __asm__ ("multu %2,%3" \
720 : "=l" ((USItype)(w0)), \
721 "=h" ((USItype)(w1)) \
722 : "d" ((USItype)(u)), \
723 "d" ((USItype)(v)))
724#else
725#define umul_ppmm(w1, w0, u, v) \
726 __asm__ ("multu %2,%3 \n" \
727 "mflo %0 \n" \
728 "mfhi %1" \
729 : "=d" ((USItype)(w0)), \
730 "=d" ((USItype)(w1)) \
731 : "d" ((USItype)(u)), \
732 "d" ((USItype)(v)))
733#endif
734#define UMUL_TIME 10
735#define UDIV_TIME 100
736#endif /* __mips__ */
737
738/***************************************
739 ************** MIPS/64 **************
740 ***************************************/
741#if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64
742#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
743#define umul_ppmm(w1, w0, u, v) \
744 __asm__ ("dmultu %2,%3" \
745 : "=l" ((UDItype)(w0)), \
746 "=h" ((UDItype)(w1)) \
747 : "d" ((UDItype)(u)), \
748 "d" ((UDItype)(v)))
749#else
750#define umul_ppmm(w1, w0, u, v) \
751 __asm__ ("dmultu %2,%3 \n" \
752 "mflo %0 \n" \
753 "mfhi %1" \
754 : "=d" ((UDItype)(w0)), \
755 "=d" ((UDItype)(w1)) \
756 : "d" ((UDItype)(u)), \
757 "d" ((UDItype)(v)))
758#endif
759#define UMUL_TIME 20
760#define UDIV_TIME 140
761#endif /* __mips__ */
762
763
764/***************************************
765 ************** 32000 ****************
766 ***************************************/
767#if defined (__ns32000__) && W_TYPE_SIZE == 32
768#define umul_ppmm(w1, w0, u, v) \
769 ({union {UDItype __ll; \
770 struct {USItype __l, __h;} __i; \
771 } __xx; \
772 __asm__ ("meid %2,%0" \
773 : "=g" (__xx.__ll) \
774 : "%0" ((USItype)(u)), \
775 "g" ((USItype)(v))); \
776 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
777#define __umulsidi3(u, v) \
778 ({UDItype __w; \
779 __asm__ ("meid %2,%0" \
780 : "=g" (__w) \
781 : "%0" ((USItype)(u)), \
782 "g" ((USItype)(v))); \
783 __w; })
784#define udiv_qrnnd(q, r, n1, n0, d) \
785 ({union {UDItype __ll; \
786 struct {USItype __l, __h;} __i; \
787 } __xx; \
788 __xx.__i.__h = (n1); __xx.__i.__l = (n0); \
789 __asm__ ("deid %2,%0" \
790 : "=g" (__xx.__ll) \
791 : "0" (__xx.__ll), \
792 "g" ((USItype)(d))); \
793 (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
794#define count_trailing_zeros(count,x) \
795 do {
796 __asm__ ("ffsd %2,%0" \
797 : "=r" ((USItype) (count)) \
798 : "0" ((USItype) 0), \
799 "r" ((USItype) (x))); \
800 } while (0)
801#endif /* __ns32000__ */
802
803
804/***************************************
805 ************** PPC ******************
806 ***************************************/
807#if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32
808#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
809 do { \
810 if (__builtin_constant_p (bh) && (bh) == 0) \
811 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \
812 : "=r" ((USItype)(sh)), \
813 "=&r" ((USItype)(sl)) \
814 : "%r" ((USItype)(ah)), \
815 "%r" ((USItype)(al)), \
816 "rI" ((USItype)(bl))); \
817 else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
818 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
819 : "=r" ((USItype)(sh)), \
820 "=&r" ((USItype)(sl)) \
821 : "%r" ((USItype)(ah)), \
822 "%r" ((USItype)(al)), \
823 "rI" ((USItype)(bl))); \
824 else \
825 __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
826 : "=r" ((USItype)(sh)), \
827 "=&r" ((USItype)(sl)) \
828 : "%r" ((USItype)(ah)), \
829 "r" ((USItype)(bh)), \
830 "%r" ((USItype)(al)), \
831 "rI" ((USItype)(bl))); \
832 } while (0)
833#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
834 do { \
835 if (__builtin_constant_p (ah) && (ah) == 0) \
836 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \
837 : "=r" ((USItype)(sh)), \
838 "=&r" ((USItype)(sl)) \
839 : "r" ((USItype)(bh)), \
840 "rI" ((USItype)(al)), \
841 "r" ((USItype)(bl))); \
842 else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0) \
843 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
844 : "=r" ((USItype)(sh)), \
845 "=&r" ((USItype)(sl)) \
846 : "r" ((USItype)(bh)), \
847 "rI" ((USItype)(al)), \
848 "r" ((USItype)(bl))); \
849 else if (__builtin_constant_p (bh) && (bh) == 0) \
850 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \
851 : "=r" ((USItype)(sh)), \
852 "=&r" ((USItype)(sl)) \
853 : "r" ((USItype)(ah)), \
854 "rI" ((USItype)(al)), \
855 "r" ((USItype)(bl))); \
856 else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
857 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
858 : "=r" ((USItype)(sh)), \
859 "=&r" ((USItype)(sl)) \
860 : "r" ((USItype)(ah)), \
861 "rI" ((USItype)(al)), \
862 "r" ((USItype)(bl))); \
863 else \
864 __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \
865 : "=r" ((USItype)(sh)), \
866 "=&r" ((USItype)(sl)) \
867 : "r" ((USItype)(ah)), \
868 "r" ((USItype)(bh)), \
869 "rI" ((USItype)(al)), \
870 "r" ((USItype)(bl))); \
871 } while (0)
872#define count_leading_zeros(count, x) \
873 __asm__ ("{cntlz|cntlzw} %0,%1" \
874 : "=r" ((USItype)(count)) \
875 : "r" ((USItype)(x)))
876#define COUNT_LEADING_ZEROS_0 32
877#if defined (_ARCH_PPC)
878#define umul_ppmm(ph, pl, m0, m1) \
879 do { \
880 USItype __m0 = (m0), __m1 = (m1); \
881 __asm__ ("mulhwu %0,%1,%2" \
882 : "=r" ((USItype) ph) \
883 : "%r" (__m0), \
884 "r" (__m1)); \
885 (pl) = __m0 * __m1; \
886 } while (0)
887#define UMUL_TIME 15
888#define smul_ppmm(ph, pl, m0, m1) \
889 do { \
890 SItype __m0 = (m0), __m1 = (m1); \
891 __asm__ ("mulhw %0,%1,%2" \
892 : "=r" ((SItype) ph) \
893 : "%r" (__m0), \
894 "r" (__m1)); \
895 (pl) = __m0 * __m1; \
896 } while (0)
897#define SMUL_TIME 14
898#define UDIV_TIME 120
899#else
900#define umul_ppmm(xh, xl, m0, m1) \
901 do { \
902 USItype __m0 = (m0), __m1 = (m1); \
903 __asm__ ("mul %0,%2,%3" \
904 : "=r" ((USItype)(xh)), \
905 "=q" ((USItype)(xl)) \
906 : "r" (__m0), \
907 "r" (__m1)); \
908 (xh) += ((((SItype) __m0 >> 31) & __m1) \
909 + (((SItype) __m1 >> 31) & __m0)); \
910 } while (0)
911#define UMUL_TIME 8
912#define smul_ppmm(xh, xl, m0, m1) \
913 __asm__ ("mul %0,%2,%3" \
914 : "=r" ((SItype)(xh)), \
915 "=q" ((SItype)(xl)) \
916 : "r" (m0), \
917 "r" (m1))
918#define SMUL_TIME 4
919#define sdiv_qrnnd(q, r, nh, nl, d) \
920 __asm__ ("div %0,%2,%4" \
921 : "=r" ((SItype)(q)), "=q" ((SItype)(r)) \
922 : "r" ((SItype)(nh)), "1" ((SItype)(nl)), "r" ((SItype)(d)))
923#define UDIV_TIME 100
924#endif
925#endif /* Power architecture variants. */
926
927/* Powerpc 64 bit support taken from gmp-4.1.2. */
928/* We should test _IBMR2 here when we add assembly support for the system
929 vendor compilers. */
930#if 0 /* Not yet enabled becuase we don't have hardware for a test. */
931#if (defined (_ARCH_PPC) || defined (__powerpc__)) && W_TYPE_SIZE == 64
932#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
933 do { \
934 if (__builtin_constant_p (bh) && (bh) == 0) \
935 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \
936 : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
937 else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0) \
938 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
939 : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
940 else \
941 __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
942 : "=r" (sh), "=&r" (sl) \
943 : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl)); \
944 } while (0)
945#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
946 do { \
947 if (__builtin_constant_p (ah) && (ah) == 0) \
948 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \
949 : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
950 else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0) \
951 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
952 : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
953 else if (__builtin_constant_p (bh) && (bh) == 0) \
954 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \
955 : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
956 else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0) \
957 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
958 : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
959 else \
960 __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \
961 : "=r" (sh), "=&r" (sl) \
962 : "r" (ah), "r" (bh), "rI" (al), "r" (bl)); \
963 } while (0)
964#define count_leading_zeros(count, x) \
965 __asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x))
966#define COUNT_LEADING_ZEROS_0 64
967#define umul_ppmm(ph, pl, m0, m1) \
968 do { \
969 UDItype __m0 = (m0), __m1 = (m1); \
970 __asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \
971 (pl) = __m0 * __m1; \
972 } while (0)
973#define UMUL_TIME 15
974#define smul_ppmm(ph, pl, m0, m1) \
975 do { \
976 DItype __m0 = (m0), __m1 = (m1); \
977 __asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \
978 (pl) = __m0 * __m1; \
979 } while (0)
980#define SMUL_TIME 14 /* ??? */
981#define UDIV_TIME 120 /* ??? */
982#endif /* 64-bit PowerPC. */
983#endif /* if 0 */
984
985/***************************************
986 ************** PYR ******************
987 ***************************************/
988#if defined (__pyr__) && W_TYPE_SIZE == 32
989#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
990 __asm__ ("addw %5,%1 \n" \
991 "addwc %3,%0" \
992 : "=r" ((USItype)(sh)), \
993 "=&r" ((USItype)(sl)) \
994 : "%0" ((USItype)(ah)), \
995 "g" ((USItype)(bh)), \
996 "%1" ((USItype)(al)), \
997 "g" ((USItype)(bl)))
998#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
999 __asm__ ("subw %5,%1 \n" \
1000 "subwb %3,%0" \
1001 : "=r" ((USItype)(sh)), \
1002 "=&r" ((USItype)(sl)) \
1003 : "0" ((USItype)(ah)), \
1004 "g" ((USItype)(bh)), \
1005 "1" ((USItype)(al)), \
1006 "g" ((USItype)(bl)))
1007/* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP. */
1008#define umul_ppmm(w1, w0, u, v) \
1009 ({union {UDItype __ll; \
1010 struct {USItype __h, __l;} __i; \
1011 } __xx; \
1012 __asm__ ("movw %1,%R0 \n" \
1013 "uemul %2,%0" \
1014 : "=&r" (__xx.__ll) \
1015 : "g" ((USItype) (u)), \
1016 "g" ((USItype)(v))); \
1017 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
1018#endif /* __pyr__ */
1019
1020
1021/***************************************
1022 ************** RT/ROMP **************
1023 ***************************************/
1024#if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
1025#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1026 __asm__ ("a %1,%5 \n" \
1027 "ae %0,%3" \
1028 : "=r" ((USItype)(sh)), \
1029 "=&r" ((USItype)(sl)) \
1030 : "%0" ((USItype)(ah)), \
1031 "r" ((USItype)(bh)), \
1032 "%1" ((USItype)(al)), \
1033 "r" ((USItype)(bl)))
1034#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1035 __asm__ ("s %1,%5\n" \
1036 "se %0,%3" \
1037 : "=r" ((USItype)(sh)), \
1038 "=&r" ((USItype)(sl)) \
1039 : "0" ((USItype)(ah)), \
1040 "r" ((USItype)(bh)), \
1041 "1" ((USItype)(al)), \
1042 "r" ((USItype)(bl)))
1043#define umul_ppmm(ph, pl, m0, m1) \
1044 do { \
1045 USItype __m0 = (m0), __m1 = (m1); \
1046 __asm__ ( \
1047 "s r2,r2 \n" \
1048 "mts r10,%2 \n" \
1049 "m r2,%3 \n" \
1050 "m r2,%3 \n" \
1051 "m r2,%3 \n" \
1052 "m r2,%3 \n" \
1053 "m r2,%3 \n" \
1054 "m r2,%3 \n" \
1055 "m r2,%3 \n" \
1056 "m r2,%3 \n" \
1057 "m r2,%3 \n" \
1058 "m r2,%3 \n" \
1059 "m r2,%3 \n" \
1060 "m r2,%3 \n" \
1061 "m r2,%3 \n" \
1062 "m r2,%3 \n" \
1063 "m r2,%3 \n" \
1064 "m r2,%3 \n" \
1065 "cas %0,r2,r0 \n" \
1066 "mfs r10,%1" \
1067 : "=r" ((USItype)(ph)), \
1068 "=r" ((USItype)(pl)) \
1069 : "%r" (__m0), \
1070 "r" (__m1) \
1071 : "r2"); \
1072 (ph) += ((((SItype) __m0 >> 31) & __m1) \
1073 + (((SItype) __m1 >> 31) & __m0)); \
1074 } while (0)
1075#define UMUL_TIME 20
1076#define UDIV_TIME 200
1077#define count_leading_zeros(count, x) \
1078 do { \
1079 if ((x) >= 0x10000) \
1080 __asm__ ("clz %0,%1" \
1081 : "=r" ((USItype)(count)) \
1082 : "r" ((USItype)(x) >> 16)); \
1083 else \
1084 { \
1085 __asm__ ("clz %0,%1" \
1086 : "=r" ((USItype)(count)) \
1087 : "r" ((USItype)(x))); \
1088 (count) += 16; \
1089 } \
1090 } while (0)
1091#endif /* RT/ROMP */
1092
1093
1094/***************************************
1095 ************** SH2 ******************
1096 ***************************************/
1097#if (defined (__sh2__) || defined(__sh3__) || defined(__SH4__) ) \
1098 && W_TYPE_SIZE == 32
1099#define umul_ppmm(w1, w0, u, v) \
1100 __asm__ ( \
1101 "dmulu.l %2,%3\n" \
1102 "sts macl,%1\n" \
1103 "sts mach,%0" \
1104 : "=r" ((USItype)(w1)), \
1105 "=r" ((USItype)(w0)) \
1106 : "r" ((USItype)(u)), \
1107 "r" ((USItype)(v)) \
1108 : "macl", "mach")
1109#define UMUL_TIME 5
1110#endif
1111
1112/***************************************
1113 ************** SPARC ****************
1114 ***************************************/
1115#if defined (__sparc__) && W_TYPE_SIZE == 32
1116#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1117 __asm__ ("addcc %r4,%5,%1\n" \
1118 "addx %r2,%3,%0" \
1119 : "=r" ((USItype)(sh)), \
1120 "=&r" ((USItype)(sl)) \
1121 : "%rJ" ((USItype)(ah)), \
1122 "rI" ((USItype)(bh)), \
1123 "%rJ" ((USItype)(al)), \
1124 "rI" ((USItype)(bl)) \
1125 __CLOBBER_CC)
1126#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1127 __asm__ ("subcc %r4,%5,%1\n" \
1128 "subx %r2,%3,%0" \
1129 : "=r" ((USItype)(sh)), \
1130 "=&r" ((USItype)(sl)) \
1131 : "rJ" ((USItype)(ah)), \
1132 "rI" ((USItype)(bh)), \
1133 "rJ" ((USItype)(al)), \
1134 "rI" ((USItype)(bl)) \
1135 __CLOBBER_CC)
1136#if defined (__sparc_v8__)
1137/* Don't match immediate range because, 1) it is not often useful,
1138 2) the 'I' flag thinks of the range as a 13 bit signed interval,
1139 while we want to match a 13 bit interval, sign extended to 32 bits,
1140 but INTERPRETED AS UNSIGNED. */
1141#define umul_ppmm(w1, w0, u, v) \
1142 __asm__ ("umul %2,%3,%1;rd %%y,%0" \
1143 : "=r" ((USItype)(w1)), \
1144 "=r" ((USItype)(w0)) \
1145 : "r" ((USItype)(u)), \
1146 "r" ((USItype)(v)))
1147#define UMUL_TIME 5
1148#ifndef SUPERSPARC /* SuperSPARC's udiv only handles 53 bit dividends */
1149#define udiv_qrnnd(q, r, n1, n0, d) \
1150 do { \
1151 USItype __q; \
1152 __asm__ ("mov %1,%%y;nop;nop;nop;udiv %2,%3,%0" \
1153 : "=r" ((USItype)(__q)) \
1154 : "r" ((USItype)(n1)), \
1155 "r" ((USItype)(n0)), \
1156 "r" ((USItype)(d))); \
1157 (r) = (n0) - __q * (d); \
1158 (q) = __q; \
1159 } while (0)
1160#define UDIV_TIME 25
1161#endif /* SUPERSPARC */
1162#else /* ! __sparc_v8__ */
1163#if defined (__sparclite__)
1164/* This has hardware multiply but not divide. It also has two additional
1165 instructions scan (ffs from high bit) and divscc. */
1166#define umul_ppmm(w1, w0, u, v) \
1167 __asm__ ("umul %2,%3,%1;rd %%y,%0" \
1168 : "=r" ((USItype)(w1)), \
1169 "=r" ((USItype)(w0)) \
1170 : "r" ((USItype)(u)), \
1171 "r" ((USItype)(v)))
1172#define UMUL_TIME 5
1173#define udiv_qrnnd(q, r, n1, n0, d) \
1174 __asm__ ("! Inlined udiv_qrnnd \n" \
1175 " wr %%g0,%2,%%y ! Not a delayed write for sparclite \n" \
1176 " tst %%g0 \n" \
1177 " divscc %3,%4,%%g1 \n" \
1178 " divscc %%g1,%4,%%g1 \n" \
1179 " divscc %%g1,%4,%%g1 \n" \
1180 " divscc %%g1,%4,%%g1 \n" \
1181 " divscc %%g1,%4,%%g1 \n" \
1182 " divscc %%g1,%4,%%g1 \n" \
1183 " divscc %%g1,%4,%%g1 \n" \
1184 " divscc %%g1,%4,%%g1 \n" \
1185 " divscc %%g1,%4,%%g1 \n" \
1186 " divscc %%g1,%4,%%g1 \n" \
1187 " divscc %%g1,%4,%%g1 \n" \
1188 " divscc %%g1,%4,%%g1 \n" \
1189 " divscc %%g1,%4,%%g1 \n" \
1190 " divscc %%g1,%4,%%g1 \n" \
1191 " divscc %%g1,%4,%%g1 \n" \
1192 " divscc %%g1,%4,%%g1 \n" \
1193 " divscc %%g1,%4,%%g1 \n" \
1194 " divscc %%g1,%4,%%g1 \n" \
1195 " divscc %%g1,%4,%%g1 \n" \
1196 " divscc %%g1,%4,%%g1 \n" \
1197 " divscc %%g1,%4,%%g1 \n" \
1198 " divscc %%g1,%4,%%g1 \n" \
1199 " divscc %%g1,%4,%%g1 \n" \
1200 " divscc %%g1,%4,%%g1 \n" \
1201 " divscc %%g1,%4,%%g1 \n" \
1202 " divscc %%g1,%4,%%g1 \n" \
1203 " divscc %%g1,%4,%%g1 \n" \
1204 " divscc %%g1,%4,%%g1 \n" \
1205 " divscc %%g1,%4,%%g1 \n" \
1206 " divscc %%g1,%4,%%g1 \n" \
1207 " divscc %%g1,%4,%%g1 \n" \
1208 " divscc %%g1,%4,%0 \n" \
1209 " rd %%y,%1 \n" \
1210 " bl,a 1f \n" \
1211 " add %1,%4,%1 \n" \
1212 "1: ! End of inline udiv_qrnnd" \
1213 : "=r" ((USItype)(q)), \
1214 "=r" ((USItype)(r)) \
1215 : "r" ((USItype)(n1)), \
1216 "r" ((USItype)(n0)), \
1217 "rI" ((USItype)(d)) \
1218 : "%g1" __AND_CLOBBER_CC)
1219#define UDIV_TIME 37
1220#define count_leading_zeros(count, x) \
1221 __asm__ ("scan %1,0,%0" \
1222 : "=r" ((USItype)(x)) \
1223 : "r" ((USItype)(count)))
1224/* Early sparclites return 63 for an argument of 0, but they warn that future
1225 implementations might change this. Therefore, leave COUNT_LEADING_ZEROS_0
1226 undefined. */
1227#endif /* __sparclite__ */
1228#endif /* __sparc_v8__ */
1229/* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd. */
1230#ifndef umul_ppmm
1231#define umul_ppmm(w1, w0, u, v) \
1232 __asm__ ("! Inlined umul_ppmm \n" \
1233 " wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr \n" \
1234 " sra %3,31,%%g2 ! Don't move this insn \n" \
1235 " and %2,%%g2,%%g2 ! Don't move this insn \n" \
1236 " andcc %%g0,0,%%g1 ! Don't move this insn \n" \
1237 " mulscc %%g1,%3,%%g1 \n" \
1238 " mulscc %%g1,%3,%%g1 \n" \
1239 " mulscc %%g1,%3,%%g1 \n" \
1240 " mulscc %%g1,%3,%%g1 \n" \
1241 " mulscc %%g1,%3,%%g1 \n" \
1242 " mulscc %%g1,%3,%%g1 \n" \
1243 " mulscc %%g1,%3,%%g1 \n" \
1244 " mulscc %%g1,%3,%%g1 \n" \
1245 " mulscc %%g1,%3,%%g1 \n" \
1246 " mulscc %%g1,%3,%%g1 \n" \
1247 " mulscc %%g1,%3,%%g1 \n" \
1248 " mulscc %%g1,%3,%%g1 \n" \
1249 " mulscc %%g1,%3,%%g1 \n" \
1250 " mulscc %%g1,%3,%%g1 \n" \
1251 " mulscc %%g1,%3,%%g1 \n" \
1252 " mulscc %%g1,%3,%%g1 \n" \
1253 " mulscc %%g1,%3,%%g1 \n" \
1254 " mulscc %%g1,%3,%%g1 \n" \
1255 " mulscc %%g1,%3,%%g1 \n" \
1256 " mulscc %%g1,%3,%%g1 \n" \
1257 " mulscc %%g1,%3,%%g1 \n" \
1258 " mulscc %%g1,%3,%%g1 \n" \
1259 " mulscc %%g1,%3,%%g1 \n" \
1260 " mulscc %%g1,%3,%%g1 \n" \
1261 " mulscc %%g1,%3,%%g1 \n" \
1262 " mulscc %%g1,%3,%%g1 \n" \
1263 " mulscc %%g1,%3,%%g1 \n" \
1264 " mulscc %%g1,%3,%%g1 \n" \
1265 " mulscc %%g1,%3,%%g1 \n" \
1266 " mulscc %%g1,%3,%%g1 \n" \
1267 " mulscc %%g1,%3,%%g1 \n" \
1268 " mulscc %%g1,%3,%%g1 \n" \
1269 " mulscc %%g1,0,%%g1 \n" \
1270 " add %%g1,%%g2,%0 \n" \
1271 " rd %%y,%1" \
1272 : "=r" ((USItype)(w1)), \
1273 "=r" ((USItype)(w0)) \
1274 : "%rI" ((USItype)(u)), \
1275 "r" ((USItype)(v)) \
1276 : "%g1", "%g2" __AND_CLOBBER_CC)
1277#define UMUL_TIME 39 /* 39 instructions */
1278#endif
1279#ifndef udiv_qrnnd
1280#ifndef LONGLONG_STANDALONE
1281#define udiv_qrnnd(q, r, n1, n0, d) \
1282 do { USItype __r; \
1283 (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \
1284 (r) = __r; \
1285 } while (0)
1286extern USItype __udiv_qrnnd ();
1287#define UDIV_TIME 140
1288#endif /* LONGLONG_STANDALONE */
1289#endif /* udiv_qrnnd */
1290#endif /* __sparc__ */
1291
1292
1293/***************************************
1294 ************** VAX ******************
1295 ***************************************/
1296#if defined (__vax__) && W_TYPE_SIZE == 32
1297#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1298 __asm__ ("addl2 %5,%1\n" \
1299 "adwc %3,%0" \
1300 : "=g" ((USItype)(sh)), \
1301 "=&g" ((USItype)(sl)) \
1302 : "%0" ((USItype)(ah)), \
1303 "g" ((USItype)(bh)), \
1304 "%1" ((USItype)(al)), \
1305 "g" ((USItype)(bl)))
1306#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1307 __asm__ ("subl2 %5,%1\n" \
1308 "sbwc %3,%0" \
1309 : "=g" ((USItype)(sh)), \
1310 "=&g" ((USItype)(sl)) \
1311 : "0" ((USItype)(ah)), \
1312 "g" ((USItype)(bh)), \
1313 "1" ((USItype)(al)), \
1314 "g" ((USItype)(bl)))
1315#define umul_ppmm(xh, xl, m0, m1) \
1316 do { \
1317 union {UDItype __ll; \
1318 struct {USItype __l, __h;} __i; \
1319 } __xx; \
1320 USItype __m0 = (m0), __m1 = (m1); \
1321 __asm__ ("emul %1,%2,$0,%0" \
1322 : "=g" (__xx.__ll) \
1323 : "g" (__m0), \
1324 "g" (__m1)); \
1325 (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
1326 (xh) += ((((SItype) __m0 >> 31) & __m1) \
1327 + (((SItype) __m1 >> 31) & __m0)); \
1328 } while (0)
1329#define sdiv_qrnnd(q, r, n1, n0, d) \
1330 do { \
1331 union {DItype __ll; \
1332 struct {SItype __l, __h;} __i; \
1333 } __xx; \
1334 __xx.__i.__h = n1; __xx.__i.__l = n0; \
1335 __asm__ ("ediv %3,%2,%0,%1" \
1336 : "=g" (q), "=g" (r) \
1337 : "g" (__xx.__ll), "g" (d)); \
1338 } while (0)
1339#endif /* __vax__ */
1340
1341
1342/***************************************
1343 ************** Z8000 ****************
1344 ***************************************/
1345#if defined (__z8000__) && W_TYPE_SIZE == 16
1346#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1347 __asm__ ("add %H1,%H5\n\tadc %H0,%H3" \
1348 : "=r" ((unsigned int)(sh)), \
1349 "=&r" ((unsigned int)(sl)) \
1350 : "%0" ((unsigned int)(ah)), \
1351 "r" ((unsigned int)(bh)), \
1352 "%1" ((unsigned int)(al)), \
1353 "rQR" ((unsigned int)(bl)))
1354#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1355 __asm__ ("sub %H1,%H5\n\tsbc %H0,%H3" \
1356 : "=r" ((unsigned int)(sh)), \
1357 "=&r" ((unsigned int)(sl)) \
1358 : "0" ((unsigned int)(ah)), \
1359 "r" ((unsigned int)(bh)), \
1360 "1" ((unsigned int)(al)), \
1361 "rQR" ((unsigned int)(bl)))
1362#define umul_ppmm(xh, xl, m0, m1) \
1363 do { \
1364 union {long int __ll; \
1365 struct {unsigned int __h, __l;} __i; \
1366 } __xx; \
1367 unsigned int __m0 = (m0), __m1 = (m1); \
1368 __asm__ ("mult %S0,%H3" \
1369 : "=r" (__xx.__i.__h), \
1370 "=r" (__xx.__i.__l) \
1371 : "%1" (__m0), \
1372 "rQR" (__m1)); \
1373 (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
1374 (xh) += ((((signed int) __m0 >> 15) & __m1) \
1375 + (((signed int) __m1 >> 15) & __m0)); \
1376 } while (0)
1377#endif /* __z8000__ */
1378
1379#endif /* __GNUC__ */
1380#endif /* !__riscos__ */
1381
1382
1383/***************************************
1384 *********** Generic Versions ********
1385 ***************************************/
1386#if !defined (umul_ppmm) && defined (__umulsidi3)
1387#define umul_ppmm(ph, pl, m0, m1) \
1388 { \
1389 UDWtype __ll = __umulsidi3 (m0, m1); \
1390 ph = (UWtype) (__ll >> W_TYPE_SIZE); \
1391 pl = (UWtype) __ll; \
1392 }
1393#endif
1394
1395#if !defined (__umulsidi3)
1396#define __umulsidi3(u, v) \
1397 ({UWtype __hi, __lo; \
1398 umul_ppmm (__hi, __lo, u, v); \
1399 ((UDWtype) __hi << W_TYPE_SIZE) | __lo; })
1400#endif
1401
1402/* If this machine has no inline assembler, use C macros. */
1403
1404#if !defined (add_ssaaaa)
1405#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1406 do { \
1407 UWtype __x; \
1408 __x = (al) + (bl); \
1409 (sh) = (ah) + (bh) + (__x < (al)); \
1410 (sl) = __x; \
1411 } while (0)
1412#endif
1413
1414#if !defined (sub_ddmmss)
1415#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1416 do { \
1417 UWtype __x; \
1418 __x = (al) - (bl); \
1419 (sh) = (ah) - (bh) - (__x > (al)); \
1420 (sl) = __x; \
1421 } while (0)
1422#endif
1423
1424#if !defined (umul_ppmm)
1425#define umul_ppmm(w1, w0, u, v) \
1426 do { \
1427 UWtype __x0, __x1, __x2, __x3; \
1428 UHWtype __ul, __vl, __uh, __vh; \
1429 UWtype __u = (u), __v = (v); \
1430 \
1431 __ul = __ll_lowpart (__u); \
1432 __uh = __ll_highpart (__u); \
1433 __vl = __ll_lowpart (__v); \
1434 __vh = __ll_highpart (__v); \
1435 \
1436 __x0 = (UWtype) __ul * __vl; \
1437 __x1 = (UWtype) __ul * __vh; \
1438 __x2 = (UWtype) __uh * __vl; \
1439 __x3 = (UWtype) __uh * __vh; \
1440 \
1441 __x1 += __ll_highpart (__x0);/* this can't give carry */ \
1442 __x1 += __x2; /* but this indeed can */ \
1443 if (__x1 < __x2) /* did we get it? */ \
1444 __x3 += __ll_B; /* yes, add it in the proper pos. */ \
1445 \
1446 (w1) = __x3 + __ll_highpart (__x1); \
1447 (w0) = (__ll_lowpart (__x1) << W_TYPE_SIZE/2) + __ll_lowpart (__x0);\
1448 } while (0)
1449#endif
1450
1451#if !defined (umul_ppmm)
1452#define smul_ppmm(w1, w0, u, v) \
1453 do { \
1454 UWtype __w1; \
1455 UWtype __m0 = (u), __m1 = (v); \
1456 umul_ppmm (__w1, w0, __m0, __m1); \
1457 (w1) = __w1 - (-(__m0 >> (W_TYPE_SIZE - 1)) & __m1) \
1458 - (-(__m1 >> (W_TYPE_SIZE - 1)) & __m0); \
1459 } while (0)
1460#endif
1461
1462/* Define this unconditionally, so it can be used for debugging. */
1463#define __udiv_qrnnd_c(q, r, n1, n0, d) \
1464 do { \
1465 UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m; \
1466 __d1 = __ll_highpart (d); \
1467 __d0 = __ll_lowpart (d); \
1468 \
1469 __r1 = (n1) % __d1; \
1470 __q1 = (n1) / __d1; \
1471 __m = (UWtype) __q1 * __d0; \
1472 __r1 = __r1 * __ll_B | __ll_highpart (n0); \
1473 if (__r1 < __m) \
1474 { \
1475 __q1--, __r1 += (d); \
1476 if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1477 if (__r1 < __m) \
1478 __q1--, __r1 += (d); \
1479 } \
1480 __r1 -= __m; \
1481 \
1482 __r0 = __r1 % __d1; \
1483 __q0 = __r1 / __d1; \
1484 __m = (UWtype) __q0 * __d0; \
1485 __r0 = __r0 * __ll_B | __ll_lowpart (n0); \
1486 if (__r0 < __m) \
1487 { \
1488 __q0--, __r0 += (d); \
1489 if (__r0 >= (d)) \
1490 if (__r0 < __m) \
1491 __q0--, __r0 += (d); \
1492 } \
1493 __r0 -= __m; \
1494 \
1495 (q) = (UWtype) __q1 * __ll_B | __q0; \
1496 (r) = __r0; \
1497 } while (0)
1498
1499/* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1500 __udiv_w_sdiv (defined in libgcc or elsewhere). */
1501#if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1502#define udiv_qrnnd(q, r, nh, nl, d) \
1503 do { \
1504 UWtype __r; \
1505 (q) = __MPN(udiv_w_sdiv) (&__r, nh, nl, d); \
1506 (r) = __r; \
1507 } while (0)
1508#endif
1509
1510/* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c. */
1511#if !defined (udiv_qrnnd)
1512#define UDIV_NEEDS_NORMALIZATION 1
1513#define udiv_qrnnd __udiv_qrnnd_c
1514#endif
1515
1516#if !defined (count_leading_zeros)
1517extern
1518#ifdef __STDC__
1519const
1520#endif
1521unsigned char _gcry_clz_tab[];
1522#define MPI_INTERNAL_NEED_CLZ_TAB 1
1523#define count_leading_zeros(count, x) \
1524 do { \
1525 UWtype __xr = (x); \
1526 UWtype __a; \
1527 \
1528 if (W_TYPE_SIZE <= 32) \
1529 { \
1530 __a = __xr < ((UWtype) 1 << 2*__BITS4) \
1531 ? (__xr < ((UWtype) 1 << __BITS4) ? 0 : __BITS4) \
1532 : (__xr < ((UWtype) 1 << 3*__BITS4) ? 2*__BITS4 : 3*__BITS4);\
1533 } \
1534 else \
1535 { \
1536 for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8) \
1537 if (((__xr >> __a) & 0xff) != 0) \
1538 break; \
1539 } \
1540 \
1541 (count) = W_TYPE_SIZE - (_gcry_clz_tab[__xr >> __a] + __a); \
1542 } while (0)
1543/* This version gives a well-defined value for zero. */
1544#define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1545#endif
1546
1547#if !defined (count_trailing_zeros)
1548/* Define count_trailing_zeros using count_leading_zeros. The latter might be
1549 defined in asm, but if it is not, the C version above is good enough. */
1550#define count_trailing_zeros(count, x) \
1551 do { \
1552 UWtype __ctz_x = (x); \
1553 UWtype __ctz_c; \
1554 count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x); \
1555 (count) = W_TYPE_SIZE - 1 - __ctz_c; \
1556 } while (0)
1557#endif
1558
1559#ifndef UDIV_NEEDS_NORMALIZATION
1560#define UDIV_NEEDS_NORMALIZATION 0
1561#endif
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